Traffic volumes at data centers are exploding with the spread of cloud computing services. To solve this problem, new high-speed interfaces, such as 400 GbE and CEI-56G, are being explored to speed up communications between servers and network equipment. The receiver characteristics and jitter tolerance are key performance indicators of PHY devices, such as SERDES, used by these high-speed interfaces. Combining the 56G/64G bit/s MUX MP1861A and 56G/64G bit/s DEMUX MP1862A with an MP1800A with installed PPG, ED and jitter modulation source supports generation of serial NRZ data up to 64 Gbit/s, as well as BER and jitter tolerance measurements. The tolerance to various jitter components, such as SJ, RJ, BUJ, SSC, Dual Tone SJ, Half Period Jitter (Even/Odd Jitter), can be measured along with Bathtub Jitter to support new standards, such as CEI-56G.
■ 56G/64G bit/s MUX MP1861A
Item |
Specifications |
Data Output |
Bit Rate |
8 Gbit/s to 56.2 Gbit/s
8 Gbit/s to 64.2 Gbit/s (MP1861A-001) |
No. of Channels |
1ch and parallel sync up to 4ch by connecting MP1800A |
Amplitude |
0.5 Vp-p to 2.5 Vp-p (≤56.2 Gbit/s, MP1861A-011)
1.0 Vp-p to 2.5 Vp-p (>56.2 Gbit/s, MP1861A-011)
0.5 Vp-p to 3.5 Vp-p (≤56.2 Gbit/s, MP1861A-013)
1.0 Vp-p to 3.5 Vp-p (>56.2 Gbit/s, MP1861A-013) |
Intrinsic Random Jitter*1 |
200 fs rms (typ.)
|
Half Period Jitter |
±20 Steps |
Dimensions and Mass |
120 (W) × 90.9 (H) × 140 (D) mm (excluding projections); ≤5 kg |
28G/32G bit/s PPG MU183020A/21A
+
28G/32G bit/s ED MU183040B/41B
  +
56G/64G bit/s MUX MP1861A
+
56G/64G bit/s DEMUX MP1862A
|
System Jitter Tolerance
Typical example at 56.2 Gbit/s
|
*1: Using sampling oscilloscope with intrinsic jitter of <200 fs rms, excluding sampling oscilloscope characteristic intrinsic jitter