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Anritsu to Host Technical Sessions and Live Test Demonstrations That Advance Innovation at DesignCon 2022

3/30/2022

PAM4, USB Type-C®, PCIe® 6.0 Among Technologies to be Addressed by Test Leader During Leading Design Conference

Allen, TX – March 30, 2022 – Anritsu Company (booth #1014), a DesignCon 2022 Diamond sponsor, will highlight technologies and test solutions that are advancing innovation in emerging high-speed designs during DesignCon 2022, the premier high-speed communications and system design conference. Chip, board, and systems design engineers can attend Anritsu Test Talks for interactive test solution demonstrations, as well as learn from thought leadership presentations on next-generation high-speed technologies and testing requirements that can help verify complex designs.

Educational Technical Sessions

Anritsu will participate in a series of educational presentations and live demos from April 5-7. The focus will be on emerging and next-generation high-speed technologies and associated testing requirements to verify leading-edge components, devices, and systems.

PAM4 Technology – Anritsu Sr. Business Development Manager Hiroshi Goto will be a member of The Case of the Closing Eyes: PAM-N, What Can be Tested? panel. Held in Ballroom GH at 4:45 on April 5, the session will detail PHY layer validation techniques that are conclusive enough for widespread, error-free adoption. Session attendees will learn about the challenges of new communications system design methodology as it relates to semiconductor development and test solutions.

USB Type-C® Standard PHY Testing – On April 6 at 11:15 a.m. Mike Engbretson, Product Manager – High Speed Oscilloscope Solutions Teledyne LeCroy, will discuss the latest PHY transmitter and receiver test methods for USB4™ and DisplayPort™ 2.x. He will also touch on the latest PHY logical layer (PHY-Logic) debug tools for USB Type-C system integration. The session will be held in Mission City Ballroom B5.

Time Domain Reflectometer Application for VNAs – Michael Yang, Senior Product Manager, VNAs, Anritsu, will lead the session, which will be held at 2:00 p.m. on April 6 in Mission City Ballroom B5. Attendees will learn about using a vector network analyzer (VNA) to more cost-effectively conduct measurements when a fast-rising signal incident occurs. The time domain reflectometer measurement has traditionally required a signal generator to transmit an incident signal to a conductor and an oscilloscope to measure the reflection in time, which adds cost and test time.

PAM4 BER & JTOL Test Solution for PCIe 6.0 & Beyond – In addition to the PAM4 panel, Goto will lead a session on 32 Gbaud and above, PAM4 BER test, and jitter tolerance test. It will also include Forward Error Correction (FEC) and burst errors analysis, providing insight to engineers involved in PCIe 6.0 or 400/800GE applications.

Live Test Demonstrations

Anritsu will also conduct live demonstrations of its test solutions to verify high-speed designs as part of its Test Talks on April 6 in the Mission City Ballroom B5. Among the demos are PAM4 bit error rate (BER) and jitter tolerance (JTOL) test; FEC and burst error analysis; Signal Quality Analyzer-R MP1900A PAM4 BERT capabilities; and PCIe® 5.0 receiver LEQ compliance, RX LEQ and JTOL, and TX LEQ response time tests.

RoBAT, Ltd. (booth #1449) will be launching signal integrity test machines at DesignCon 2022. This new range includes manual, semi-automatic and fully automatic versions with integrated TDR and VNA units, including the capability to create N x N s-parameter matrix with the Anritsu ShockLine™ ME7868A two-port VNAs. The RoBAT machines are capable of high-speed testing of any bare and assembled PCB, from prototypes and coupons through to volume production boards.

Technical Presentation

PCIe 6.0 & Beyond – Continuing the thought leadership on PCIe 6.0, Goto will discuss the importance of FEC to assure transmission quality in high-speed and large-capacity data transmissions. Scheduled for April 7 at 11:15 a.m. in the Great America Meeting Room 1, the technical presentation will focus on PAM4 BER and jitter tolerance tests for SERDES, DSP, and CDR used by transceivers where the pre-FEC evaluation of bit error rate performance is required, as well as correctable/uncorrectable FEC symbol error performance.

About Anritsu

Anritsu is a provider of innovative communications test and measurement solutions. Anritsu engages customers as true partners to help develop wireless, optical, microwave/RF, and digital solutions for R&D, manufacturing, installation, and maintenance applications, as well as multidimensional service assurance solutions for network monitoring and optimization. Anritsu also provides precision microwave/RF components, optical devices, and high-speed electrical devices for communication products and systems. The company develops advanced solutions for emerging and legacy wireline and wireless technologies used in commercial, private, military/aerospace, government, and other markets.

To learn more visit www.anritsu.com and follow Anritsu on Facebook, LinkedIn, Twitter, and YouTube.

Anritsu Contact:
Laura Edwards
Senior Manager, Americas Marketing
Cell: 214.605.0638
Laura.Edwards(ATMARK)anritsu.com
Agency Contact:
Patrick Brightman
3E Public Relations
973.263.5475
pbrightman(ATMARK)3epr.com

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