ANRITSU CORPORATION is pleased to announce that its Signal Quality Analyzer-R MP1900A (hereafter, MP1900A), a PCIe measurement solution, has been selected by Kioxia Corporation (hereafter, Kioxia), a global leader in flash memory and solid-state drives (SSDs), for quality evaluation of the high-speed interfaces used in PCIe® 5.0 and PCIe® 6.0 SSDs.

PCIe interfaces used by enterprise and data center SSDs are becoming faster as AI servers and cloud servers increasingly demand higher-performance storage systems. Faster PCIe 6.0 data rates make signal-integrity verification and link training evaluation more important than ever, while also increasing evaluation complexity. As a result, developers require verification environments that ensure both measurement accuracy and development efficiency.

The MP1900A is a high-performance Bit Error Rate Tester (BERT) for evaluating the physical layer of serial high-speed interfaces; a single MP1900A supports receiver and signal integrity verification, covering a broad application range from early-stage development to compliance verification. In addition to PCIe link training*1 and LTSSM analysis*2, its excellent analog input performance delivers high input sensitivity, enabling stable evaluation and efficient debugging of high-speed PCIe 6.0 interfaces.

Kioxia uses the MP1900A in the development of PCIe 6.0 SSDs for compliance testing, including FBER*3, Rx/Tx LEQ*4, and link training evaluations. It is also used for wide-ranging development and debugging, including rare-error analysis using the Capture function and state-machine analysis using the Sequence Editor. These capabilities contribute to building an efficient evaluation environment for next-generation SSDs.

Anritsu’s continuing development of key signal-integrity verification technologies for next-generation interfaces helps semiconductor, storage, and high-speed interface developers build efficient verification environments. *PCIe® and PCI Express® are registered trademarks of PCI-SIG.

Learn more about the MP1900A

Technical Terms

*1 PCIe Link Training Function
Evaluates the process by which PCIe devices automatically negotiate communication parameters and establish a link.

*2 LTSSM Analysis Function
LTSSM (Link Training and Status State Machine) analyzes state transitions that occur during PCIe link establishment and operation.

*3 FBER Evaluation
FBER (First Bit Error Rate) evaluation measures the bit error rate before Forward Error Correction (FEC) processing in PCIe 6.0 systems.

*4 Rx/Tx LEQ Evaluation
LEQ (Link Equalization) evaluation assesses equalization performance of receiver (Rx) and transmitter (Tx) signals.

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