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Strengthened BER Test Functions for 400GbE Transceivers and DSP

2019/2/25

Multichannel Support, FEC Pattern Generation, ISI, and Error Count Import Functions

Signal Quality Analyzer-R MP1900A

Anritsu Corporation is starting sales of four PAM4 BERT options adding multichannel synchronization (max. 4ch/MP1900A main unit), multilane FEC pattern generation for 400GbE, ISI stressed signal generation simulating transmission path losses, and application software for capturing DUT error counts to the company’s Signal Quality Analyzer-R MP1900A. These options for the PAM4 PPG MU196020A released previously support bit error rate tests of high-speed interfaces, such as 400GbE. This product is a hardware and software option for addition to the PAM4 PPG MU196020A. It adds 400-GbE PAM4 signal multilane, FEC pattern generation, and jitter addition functions, which are of increasing importance for transceivers and DSP used by high-speed interfaces in data centers. These strengthened functions using only a PPG will help shorten customers' development and test times.

[Development Background]

The spread of next-generation mobile communications and cloud applications is expected to greatly increase data communications traffic volumes. As a result, in addition to increasing speeds, communications infrastructure operators, such as data centers, are examining ways to expand transmission capacity using PAM4 and multilane technologies.

The future start of 400GbE in these data centers will require use of new transceivers supporting multilane technologies, such as QSFP-DD, and OSFP as well as FEC in the PHY layer for PAM4 signal transmissions. Consequently, transceiver and device evaluations using a BERT must not only support previous jitter tolerance and input sensitivity measurements, but also key tests on the impact of crosstalk due to use of multichannels, as well as error correction. In addition to adding multichannel and FEC pattern generation functions, the PAM4 PPG MU196020A also supports the required 400GbE transceiver PHY layer tests.

Moreover, to assure interconnectivity between interfaces defined by the 400GbE standards, chip-to-chip and chip-to-module transmission-path losses have been specified, causing time and cost issues due to the need to test ICs against multiple standards and to prototype multiple different PC boards for testing the effects of transmission path losses. With PAM4 signaling, the gap between signal levels is only one-third that of the previous NRZ technology, requiring tests under stricter conditions. As a result, the PAM4 PPG MU196020A has a built-in function for simulating signals after passage via a PC board—eliminating the need to prototype multiple PC boards to test transmission path losses—as well as an ISI function.

In addition, BER measurement of general high-speed devices is performed by receiving the output from the DUT at an error detector (ED) to measure bit errors. Conversely, at the early development stage, error measurements for specific test patterns, such as PRBS, use an error-check function built-into the DUT IC, which is convenient when no ED is available. At this stage, since PPG and DUT error measurement functions require various separate operations, users need unique designs, such as tracking operation when using the PPG and ED as a set for jitter tolerance tests, as well as display of measurement results. Therefore, the MP1900A has a built-in function for communicating with the DUT IC error-check function, helping simplify MP1900A jitter tolerance measurements.

[Product Outline]

The Signal Quality Analyzer-R MP1900A is the market-leading bit error rate tester supporting generation of high-speed signals and signal analysis for 400G and faster speeds. These newly released options for the PAM4 PPG module add a multichannel function that can be expanded up to 4ch (per MP1900A main unit), a function for generating 100/200/400GbE FEC patterns and injecting errors, and an ISI function for simulating transmission path losses of various PC board designs at the PPG output port. As a result, these options support faster development and testing of 400GbE transceivers requiring multichannel measurements and error-correction tests using FEC.

Furthermore, the Error Counts Import function of the MP1900A application software can capture the DUT built-in error-check function measurement results for display on the MP1900A screen, facilitating IC error measurements, easy configuration of a jitter tolerance measurement system, and easy operation for efficient BER measurement at the initial IC development stage by purchasing only the PPG.

■ Target Markets: 400GbE transceivers and devices
■ Applications: Bit error rate evaluation of 400GbE transceivers and devices


About Anritsu

Anritsu Corporation (www.anritsu.com) is a global provider of innovative communications test and measurement solutions. The company’s 2020 VISION philosophy engages customers as true partners to help develop wireless, optical, microwave/RF, and digital solutions for R&D, manufacturing, installation, and maintenance applications, as well as multidimensional service-assurance solutions for network monitoring and optimization. Anritsu also provides precision microwave/RF components, optical devices, and high-speed electrical devices for communication products and systems. The company develops advanced solutions for 5G, M2M, IoT, as well as other emerging and legacy wireline and wireless communication markets. Anritsu sells in over 90 countries worldwide with approximately 4,000 employees.

For further information please contact:

https://www.anritsu-apsr-response.com/acton/media/19504/zh-tw-request-product-quote-form

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