High-Quality Data Output with High-Speed Tr/Tf and Low Intrinsic Jitter
The PAM4 PPG MU196020A supports output of low-noise and low-distortion high-quality data signals with a high Tr/Tf speed (20 to 80%) of 8.5 ps, a low intrinsic jitter of 170 fs rms, and a high analog bandwidth for generating wide open Eye PAM4 waveforms and high-reproducibility measurements.
Typical 58 Gbps PRBS15 Output Waveform
(J1789A 40 cm Cable and 1400 mV Differential)
53.125-Gbaud PRBS15 Output Waveform
(J1789A 40 cm Cable and Differential)
4Tap Emphasis Output at 20 dB Max
The optional 4Tap Emphasis function built into the MU196020A can generate the Pre-Emphasis and De-Emphasis signals required by each standard for maximum rates of 64.2G. Since each tap can be changed independently up to 20 dB, corrected waveforms for various transmission paths can be output with good reproducibility.
116 Gbps PAM4 Signal Error-Free BER Measurement Using High Input Sensitivity Function
Combining the PAM4 ED MU196040B with the PAM4 PPG supports BER measurements of 116 Gbps (58 Gbaud) PAM4 signals. Error-free BER measurement is achieved by the industry-best high sensitivity performance of 23 mV @ 26 Gbaud and 36 mV @ 53 Gbaud. The resulting high accuracy BER measurements make it easy to troubleshoot previously difficult-to-analyze PAM4 devices. In addition, true DUT performance can be verified because even CEI-112G-VSR-defined worst-case stressed signals can be received at low-error rates (<E-8), exceeding the specifications.
Error-Free Measurement of PAM3 Signals at 23 mV @ 26 Gbaud, and 36 mV @ 53Gbaud
CEI-112G-VSR-defined Worst-Case Stressed PAM4 Signal
PAM4 BER Measurement Screen
In addition to the Upper, Middle, and Lower Eye measurement points (voltage threshold value and phase), automatic detection of the optimum Equalizer setting automatically detects the conditions required for the best BER results. Moreover, automatic detection of the PAM4 Symbol Logic and Gray Coding conditions supports automatic evaluation of pattern conditions for the input PAM4 Symbol coding, providing a more efficient measurement environment.
The MP1900A series is an 8-slot, modular, high-performance BERT. Installing multiple 64G PAM4 PPG module boards in the slots provides the performance for measuring not only 400GbE systems but the future 800GbE systems, as well. This flexible expandability helps customers maximize product development cost efficiencies and bring products to market early.
All-in-One 64 Gbaud BER Measurement Solution
The 8-slot main chassis can accommodate various module combinations, such as PPG/ED, existing synthesizer, jitter modulation source, noise generator, and more. A compact, high cost-performance, next-generation, all-in-one measurement solution can be configured without other external instruments.
PAM4 Signal Jitter Tolerance Test Using One MP1900A
Real-time FEC Symbol Error and FEC Standard Jitter Tolerance Measurement Functions
Uncorrectable Codeword and FEC Symbol Errors can be measured and displayed on one screen in real-time simultaneously with bit error measurements. Measurement of jitter tolerance and FEC Symbol Error per codeword distribution based on correctable/uncorrectable FEC is supported (MU196040B-042). Both bit error and FEC Symbol Errors are measured at high speed.
FEC Analysis (Leaflet) >
Supports Detection and Analysis of FEC Symbol Errors
The input data is captured when the number of FEC symbol errors exceeds the threshold setting. The causes of FEC-uncorrectable errors can be analyzed from the captured data.
Supports Eye Contour Margin Test
The input signal Eye opening is measured at high speed based on the Bathtub estimate. In addition to NRZ, the PAM4 Symbol Upper, Middle, and Lower Eye openings are measured, supporting more accurate evaluation of Eye Margin characteristics at BER estimates up to E-20.
All-in-One Ethernet/PCIe® Measurement
Both PAM4 and increasingly faster PCIe 1.0 to 5.0 interfaces can be measured using this all-in-one test solution. Protocol Aware Link training*1 is supported up to PCIe 5.0 along with PAM4 Symbol Error measurements defined in the next-generation PCIe 6.0 standard and Jitter Tolerance tests, helping play a key role in first-stage PCIe certification*2.
*1: For details, refer to the Selection Guide (MP1900A-E-Z-1)
*2: Contact our business section for details related to PCIe 6.0 Link training.
Jitter/Noise Types* *: The upper noise addition rate is 32.1G.
Sine Wave Jitter (SJ)
Random Jitter (RJ)
Jitter Tolerance Test Function (MX183000A-PL001)
- Easy Jitter Tolerance measurement
- PHY device Jitter Tolerance test with impressed SJ/RJ/BUJ
- Mask measurements supporting various standards
- Shorter measurement times using low error rate (1E-12, 1E-15, and more) estimation function
- Tolerance measurement for device characteristics using four Binary, Upward, Downward, and Binary + Linear measurement methods
- Built-in Jitter Tolerance Mask standards for 200/400G including IEEE 802.3, CEI, and more
- Support for both user-defined masks and new standards