TradeShow
DesignCon 2017
2/1/2017 - 2/2/2017 , Santa Clara, California, BOOTH 633
Visit Anritsu Booth #633 at DesignCon!
Solution Demonstrations Include:
- High Speed Serial Bus Receiver Test Solution (USB3.1-C, Thunderbolt-3, PCIe-G4)
-
56Gbps PAM4 BER test solutions (400Gbps of IEEE and CEI)
- 100G AOC/Q-SFP Test Solution (IEEE, IBTA, CEI)
- 70GHz 4-Port VNA Signal Integrity Solution
- 43.5GHz 4-Port VNA Signal Integrity Solution
- Automated VNA Signal Integrity Compliance Testing
Don’t Miss our Technical Sessions!
Hear industry experts present on the latest in testing solutions on Wednesday, February 1st in Ballroom F and on Thursday, February 2nd in Great America 2.
Wednesday, February 1, 2017
Time
|
Topic
|
Speaker(s)
|
Outlook Link
|
4:00 p.m. - 4:45 p.m
|
De-embedding Sensitivities, Symmetry and Differential Pair Coupling
|
Jon Martens
|
 |
Thursday, February 2, 2017
Time
|
Topic
|
Speaker(s)
|
Outlook Link
|
10:15 AM - 10:55 AM
|
100G AOC/Q-SFP Test Solution (100GE, IBTA, CEI) |
James Morgante
|
 |
11:05 AM - 11:45 AM.
|
Signal Integrity: VNA Applications |
Joe Mallon
|
 |
2:50 PM - 3:30 PM
|
Toward 400G (IEEE802.3 and CEI) 56G PAM4 Bit Error Rate Test Solution
|
Hiroshi Goto
|
 |
3:45 PM - 5:00 PM
|
High Speed Serial Bus Receiver Test Solution |
Mike Engbretson
|
 |